CMD, 2 others, to develop flip chip packaging of IPCs

Electronic News, Feb 9, 1998 by Bernard Levine

Milpitas, Calif.--California Micro Devices (CMD), here, has formed a partnership with contract manufacturer Avex Electronics and wafer bump specialist Flip Chip Technologies to develop flip chip packaging of its patented integrated passive components (IPCs).

The trio "will collaborate in a proposed effort to develop flip chip packaging of integrated passive components (IPCs) and qualify them for use in full scale production. The ultimate goal of the partnership is to develop low cost, high volume IPCs in flip chip packaging, which can be directly attached to PC boards without intermediate packaging," the companies said. The computer and wireless markets are targeted.

Semiconductor maker CMD has been a pioneer in developing integrated passives, while many traditional passive component houses, contract manufacturers and others have been jumping into the developing market. While most observers expect traditional surface mount chips and leaded components to keep the bulk of the market for capacitors, resistors and similar veteran parts, growing demand for integrated passives is predicted, particularly for highly space-constrained applications such as wireless communications and other consumer portables. Most recently (EN, Dec. 22), contractor Flextronics International and Dow Chemical formed a joint venture called Intarsia Corp. to produce thin-film integrated passives.

For the partnership with CMD formed last week, Flip Chip Technologies, a joint venture of Kulicke & Soffa and Delco, will provide its proprietary solder bumping processing capabilities. Avex is developing the assembly processes to utilize flip chip techniques.

"Increasing performance and decreasing product size. These are the two demands turning designers away from the traditions of wirebonding and packaged ICs and towards the use of flip chips," claims Harry Hollack, president/CEO of Flip Chip Technologies. Initial developments will utilize a flip chip integrated passive network, containing 16 resistors on a single die in a footprint of 0.120-inch x 0.060-inch.

Flip chip packaging of IPCs, according to Jeff Kalb, president of CMD, "will also provide height benefits. A flip chip IPC will be less than 0.025 inches in height, compared to a standard QSOP or SOIC package which measures 0.065. These characteristics make flip chip IPCs ideal for portable devices which require both a small footprint and lower profile."

The firms added that designers "are faced with the challenge of designing systems that continue to shrink in size or include more functionality. Portable systems are the most sensitive to these space constraints, but the same issues apply to almost all systems. At the same time, performance and cost pressures continue to increase. IPCs were developed to meet these needs, and flip chip packaging will provide a further step forward over current semiconductor surface mount packaging. Flip chip packaging technology allows attachment of the chip, without any intermediate packaging, directly to a substrate. Designers concerned with reducing cost and size, and increasing the functionality of their products are expected to take advantage of the enormous benefits of these devices."