Test chip nears for foundry comparisons

Electronic News, March 2, 1998 by Dylan McGrath

San Jose, Calif.--The Fabless Semiconductor Association (FSA) last week said its long-awaited 0.25 micron test chip is on the verge of taping out. Amkor Wafer Fabrication Services, Chartered Semiconductor, Rohm LSI Systems and Worldwide Semiconductor Manufacturing Corp. (WSMC) have already signed on as partners in the FSA's 0.25 micron Standard Qualification Test Chip Program, hailed by many as an important yardstick on which fabless companies will be able to judge foundry performance.

"Conspicuous by their absence," according to FSA Executive Director Jody Shelton, are the world's top two silicon wafer foundries, United Microelectronics Corp. (UMC) and Taiwan Semiconductor Manufacturing Corp. (TSMC). Those two companies, Ms. Shelton said, have had some involvement in the development of the test chip, but declined to participate in the formal program when it became apparent that their own internal test chips would be available sooner. Ms. Shelton said she hopes UMC and TSMC will be part of the 0.18 qualification program.

"The bottom line is that we are ahead of them," said Ron Norris of TSMC-USA's office of the president. "We went out and surveyed our customers and it was nearly unanimous that they want us to keep doing what we are doing now." Mr. Norris said TSMC would consider being part of the FSA's 0.18 program if it were developed ahead of TSMC's internal chip, but he added that the company is already developing its 0.18 test chip.

"In my personal opinion, if this chip had been ready 12 months ago, TSMC very well might have used it," said Robert Strain, director of foundry technology at National Semiconductor. "I think it's very much the same for UMC."

Although the test chip program has been a hot topic at the FSA since 1994, the organization began funding the program in April 1997 at the urging of its members. The test chip contains necessary process qualification components including an SRAM, logic, qualified library and IP elements, reliability physics tests, minimum electrical parametric tests, process evaluation and SPICE modeling test structures, the FSA said. In September 1997, Mentor Graphics began the design of an SRAM component to be added to the chip. The idea is that participating foundries can run the test chip in their fabs, giving fabless companies important feedback data, which could help them make a decision on a foundry.

"This program has the potential to make an enormous impact on the consistency of data fabless companies receive from their foundry partners," said Brenda Stoner, VP of marketing, for TestChip, a Dallas company hired by the FSA to design the 0.25 micron test chip. The test chip can also help foundries improve their processes, since they will have access to the same feedback.

Reaction to the test chip qualification program has been positive. "In general, I think it's a great idea," said Joanne Itow, senior analyst with Semico Research. "It's beneficial on both sides. The foundries win, also, because they can say they can work with any fabless company. They can sell themselves easier and the fabless companies can do some shopping and comparison and have more options in terms of who they go to."

"We think it's a useful tool for having a standard vehicle for qualifying fabs," said Ed Ross, president of worldwide operations for Cirrus Logic.

The FSA also announced it has funded a wafer Reliability Monitoring Program. This program, also an attempt to standardize the foundry-fabless company relationship, will concentrate on developing guidelines for implementation of an effective reliability monitoring program and will register foundries with complaint programs. The FSA believes this program could increase reliability and reduce the frequency of maverick lots. This program has a broader list of foundry participants, including UMC and TSMC.

The two new programs are similar in scope, and eventually will merge. "They are two programs that will become one program," Ms. Shelton said.