Insilicon's Jpeg2000 Encoder Accelerates And Optimizes Next Generation Image Compression - Product Announcement

EDP Weekly's IT Monitor, July 23, 2001

inSilicon Corporation (Nasdaq:INSN) -- a provider of communications technology for complex systems-on-chip -- has announced the release of their newest image compression semiconductor intellectual property, the JPEG2000 Encoder.

JPEG2000 is the latest still image compression standard available today, designed to increase the compression ratio and quality of digital still images and text, while maintaining the 24-bit color and multi-platform compatibility advantages of the current JPEG standard. An approved ISO/ITU-T international standard since January 2001, JPEG2000 is targeted for the rapidly growing consumer, networking, and PC peripheral applications, including next-generation digital cameras, scanners, and wireless imaging devices. IDC, a leading information technology organization, projects 39 million digital cameras will ship annually by 2005. And InfoTrends Research Group, another leading information technology organization, projects over 24 million scanners will ship in 2006.

Employing the reversible 5/3 wavelet transformation algorithm, inSilicon's JPEG2000 Encoder compresses digital images at ratios exceeding 50:1. This enables on-the-fly, lossy and lossless compression schemes, allowing system designers to optimize between image compression quality and downloading time. Compared to JPEG, JPEG2000 has superior, low bit-rate compression, and is error resilient in noisy environments such as mobile web browsing. In mobile applications, the improved controls for image resolution and web browsing in JPEG2000 allow users to quickly view a set of images and download the desired image.

The inSilicon JPEG2000 Encoder is portable to any ASIC or FPGA technology and is designed for embedded application implementation with efficient gate count and low power consumption. The encoder supports four programmable quantization tables, allowing on-demand configuration of compression ratios. The JPEG2000 Encoder supports packet header processing to minimize the overhead packet-processing requirements. For fast system-on-chip integration, the encoder includes a simple CPU interface, providing easy access to all configuration options.

"As image files become larger, the need for portable devices to provide efficient, high-speed data compression is absolutely essential to satisfy the needs of the end user," said Jack Lim, product marketing manager of inSilicon. "As an example, a JPEG2000 hardware-based system allows the high-speed compression and decompression of high resolution digital photos to a camera or PC in seconds. In comparison, a JPEG software-based system would take several minutes, with much lower picture quality."

Hardware designers receive Verilog RTL source code, Verilog behavioral models, a comprehensive test suite, synthesis scripts, and documentation for integrating the JPEG2000 Encoder into a system-on-chip.

The JPEG2000 Encoder is available today, with a full JPEG2000 CODEC available this fall. Contact inSilicon for pricing information.