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Industry: Email Alert RSS FeedBaseband vector signal analyzer hardware design - HP 89410A electronic test device - Technical
Hewlett-Packard Journal, Dec, 1993 by Manfred Bartz, Keith A. Bayern, Joseph R. Diederichs, David F. Kelley
Switchable Gain Amplifiers
The remainder of the ranging is accomplished in four amplification stages together called the switchable gain amplifiers. These stages have gains of 8 dB, 6 dB, 4 dB, and 2 dB, and can each be switched into the circuit or bypassed for a 0-dB gain for the stage. Again, high-speed current-feedback operational amplifiers are employed.
To maintain distortion performance, these stages are only used one at a time. Using one or both 20-dB attenuators, the 10-dB variable-gain preamp, and one or none of the 8-dB, 6-dB, 4-dB, and 2-dB stages, ranging in 2-dB steps is achieved from -30 dBm to 28 dBm.
Trigger Output
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At the output of the switchable gain amplifiers, ranging is complete. At this point, an input signal at full scale on any range is at a fixed size of about -5 dBm with as much of the input signal's bandwidth preserved as possible.
From this point, the input signal takes two paths. One path leads to the trigger board and the other to the analog-todigital converter. The trigger circuitry demands a relatively large signal since high-speed comparators with fixed thresholds are used. Fortunately, signal fidelity demands are relaxed here.
The trigger signal first passes through another variable-gain stage very similar to the preamp. The gain is set according to the dither mode used by the analog-to-digital converter. For the half-scale dither mode used by the standalone HP 89410A, the higher 12-dB gain setting of the trigger variablegain amplifier stage is used, raising the trigger signal level to 7 dBm. For the quarter-scale dither mode used by the HP 89440A RF vector signal analyzer, the lower 6-dB gain setting is used.
The final trigger output buffer serves to further isolate the input circuitry from the harsh environment of the trigger board and sums in the output of an 8-bit digital-to-analog converter for dc offset adjustment on the trigger signal. Depending on the range, on the order of 50 MHz of 3-dB bandwidth is preserved from the input connector to the trigger output.
The trigger board provides adjustable-level triggering, overrange detection, and half-range detection. The half-range detection circuitry in particular must be isolated from the input circuits, since for signals above approximately 6 dB below the range, the half-range comparators generate square waves at the input signal frequency, providing a strong source of odd harmonic energy, which could cause distortion if allowed to couple back into the input.
Filter Drivers and Anti-Alias Filter
High-speed current-feedback operational amplifiers in an inverting parallel configuration drive the anti-alias filter. The parallel amplifiers' outputs are summed into the filter input through 100-ohm resistors, presenting a 50-ohm source impedance to the filter.
The anti-alias filter is a nine-pole, eight-zero elliptical design. The filter corner is at approximately 10.2 MHz. The stopband edge is at approximately 15.4 MHz. (Note that 15.6 MHz is the lowest frequency that can alias back into the 10-MHz band given the 25.6-MHz sample rate of the analog-to-digital conversion.) The overall input frequency response, including the effects of the filter passband, is fiat within less than 1 dB, which is easily corrected by calibration. Stop-band attenuation is typically better than 95 dB for all frequencies beyond the stop-band edge.
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