Chips: Silicon Genesis Corporation's First Public Disclosure of a New Thin Layer-Transfer Process for the Microelectronics Industry - Company Business and Marketing

Edge: Work-Group Computing Report, Oct 12, 1998

Silicon Genesis Corporation Monday made the first public disclosure of its successful development of a new layer-transfer process that the company expects will find important application in the microelectronics industry, such as fabricating silicon-on-insulator (SOI) wafers.

This proprietary technology, the Genesis Process , incorporates new manufacturing steps and tools and can help improve quality and reduce cost of advanced semiconductor materials.

The Genesis Process is the result of integrating two unique and novel technologies: a room-temperature layer-transfer process, rT-CCP (room-Temperature Controlled-Cleave Process), and a plasma implantation processing capability, PIII (Plasma Immersion Ion Implantation). rT-CCP was invented by Dr. Nathan Cheung, a Professor at the University of California at Berkeley and co-founder of Silicon Genesis.

Dr. Chung Chan, the developer of the company's PIII system, is a Professor at Northeastern University and another co-founder of Silicon Genesis. Dr. Chan contributed the key manufacturing step through his company, Waban Technology Inc. (WTI). Silicon Genesis acquired WTI in September 1997. The systems built by Waban Technology were originally intended for doping semiconductor wafers, but their potential has since been recognized as a viable alternative to beam-line ion implanters for use in the Genesis Process.

The Genesis Process: A Potentially Universal Lamination Process The Genesis Process is best understood as a very accurate thin-film lamination process. The laminate is chosen from one wafer or substrate (the "donor" wafer) while the base wafer or support may be selected from another material (the "handle" wafer). The lamination is achieved by first implanting the donor wafer with a relatively high dose of hydrogen. This sub-surface implanted hydrogen layer delineates a stress or weakened region at the wafer surface that allows the material to be separated or delaminated. This processed donor wafer is then bonded onto the handle wafer to form a wafer assembly.

To separate the laminate from the rest of the donor wafer, the unique rT-CCP non-thermal separation step cleaves the wafer assembly at the weakened region, thereby releasing the laminate onto the handle substrate. Changing the implant energy of the hydrogen varies the thickness of the laminate.

"This room-temperature cleave (rT-CCP) process is a re-application of mechanical cleave technology to the semiconductor industry," Dr. Cheung said. "The low cleave temperature and the universal quality of hydrogen to weaken materials are at the heart of the technology's broad applicability. The SOI application shows great commercial promise. We are looking forward to exploring new customer applications."

Plasma Implantation Makes It Cost Effective Plasma immersion ion implantation (PIII) tools have been recognized as cost-effective alternative to the beam-line implanter in specific applications. By using PIII technology first developed by Waban Technology, Silicon Genesis expects to address a broad range of materials and applications in the microelectronics industry. Conventional beam-line implanters can also be integrated into the Genesis Process.

"I am pleased that our plasma immersion ion implantation technology has found such an excellent application in the Genesis Process," Dr. Chan said. "With the new plasma implanter developed at Silicon Genesis, 200/300mm wafers can be processed at low cost with exceptional high throughput and thickness uniformity."

Numerous Applications The Genesis Process process has many applications due to its universal nature. For example, when used to fabricate silicon-on-insulator (SOI), silicon are used for both the donor and handle wafers. The two wafers are then coated with silicon dioxide to form an SOI wafer with independently controllable buried oxide and silicon overlayer thickness. SOI wafers are enhanced semiconductor wafers that enable the production of integrated circuits with significant advantages over circuits constructed on conventional bulk silicon or epitaxial wafers.

In another process similar to the SOI application, two silicon wafers are processed without an oxide coating. The resulting wafer is a silicon-silicon substrate, useful as an alternative to epitaxial silicon with unique advantages.

Another application for the Genesis Process is in the flat-panel industry. This can be realized if the handle wafer is quartz or glass, resulting in a silicon-on quartz or silicon-on-glass wafer. These transparent substrates may extend small display capabilities due to the high device quality silicon.

Francois J. Henley, President and Chief Executive Officer and the third co-founder of Silicon Genesis Corporation, said, "I am pleased with the progress SiGen has made during this past year towards positioning our company as a leader in layer-transfer products such as SOI and other exciting applications using the Genesis Process. Our first samples using our process show great promise and validate our belief in its exceptional combination of low cost and high quality. Now that we have proven our concept, we expect to accelerate the acceptance of our process both with end-customers and potential licensees."