Chips: Solving the Memory Bottleneck in Your Computer; Texas Instruments Presents Paper on Burn-in Testing Memory Chips at IPC Chip Scale and Ball Grid Array National Symposium - Company Business and Marketing

Edge: Work-Group Computing Report, May 10, 1999

A faster desktop computer means little when a memory bottleneck can slow everything down. Even casual computer users can suffer agonizingly slow speeds, all because the memory isn't as fast as the processor inside.

One solution to the bottleneck is to improve the protocol, or "handshake," between the memory and processor chips. Since the average computer can handle anywhere from 200 million to 500 million handshakes per second (also known as megahertz), the protocol is a critical component to overall processing.

That's why the high-tech industry is looking hard at new memory management technologies: to bring memory chip speeds up to the fastest processors for better computing. The stakes are high because memory chips such as DRAMs, SRAMs, and flash memory are used in a wide range of computers, office equipment, gaming systems and a growing group of information appliances.

"Today's microprocessors are outpacing the available memory bandwidth and creating a desperate 'need for speed' in memory chips," said James A. Forster, Ph.D., engineering manager in Texas Instruments' Interconnection Business who is presenting a paper at the IPC Chip Scale and Ball Grid Array National Symposium. His paper on "Rambus -- Challenging Burn-in Socket Design to Accommodate Differing CSP Outlines," describes the issues facing designers of testing sockets who must address the faster speeds of memory chips that use the Rambus protocol and chip-scale package design.

"The continued consumer demand for smaller and more capable computers and electronic devices is driving the need for faster memory," Forster said. "To satisfy this need manufacturers have opted to add new memory management protocols, such as Rambus, while using much of the established package and assembly manufacturing process and infrastructure. One challenge that remains is how to functionally test these faster memory chips to ensure quality."

IPC Chip Scale and Ball Grid Array National Symposium is hosted by the Institute for Interconnecting and Packaging Electronic Circuits (IPC) and features new and emerging technologies and business trends for the electronic interconnection industry.

A copy of Dr. Forster's presentation is available by contacting Lynda Armstrong of Texas Instruments' Interconnection Business at (508) 236-5388.

Texas Instruments Incorporated is a global semiconductor company and the world's leading designer and supplier of digital signal processing and analog technologies, the engines driving the digitization of electronics. Headquartered in Dallas, Texas, the company's businesses also include materials and controls, educational and productivity solutions, and digital imaging. The company has manufacturing or sales operations in more than 25 countries.

Located in Mansfield, Mass., the Interconnection Business is part of TI's Materials & Controls group. FMI: http://www.ti.com.