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Electronics Times, March 1, 1999
Researchers at the Massachusetts Institute of Technology (MIT) and MicroDisplay have developed a 160 x 120 pixel liquid crystal on silicon (LCOS) microdisplay.
The display, which features 25 micro m pixels based on a 0.8 micro m, three-metal backplane, integrates 6bit sampled ramp D/A converter (DAC) column drivers.
The DAC replaces a single pixel-rate, high-voltage, high-capacitance analogue signal with several pixel-rate digital signals and associated logic, enabling the use of digital low-power techniques.
The display consists of a three-element stack: the silicon backplane, the liquid crystal material and a transparent conductive layer.
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The pixel electrode is formed by a rectangle of metal, which also acts as a highly reflective mirror and as a light shield that reduces leakage-inducing photocurrent. Reflectivity is improved by mirror flatness, which is enhanced by careful layout of underlying pixel circuitry.
The test set-up generates the ramp with an external digital counter and a discrete DAC, although a fully integrated system would use an on- chip ramp generator with a special purpose ADC providing the ramp value.
Running at 4MHz and 5V while displaying a worst-case black and white checkerboard pattern, the chip consumes 7.25mW. Displaying a constant uniform image consumes 5.8mW. Analogue ramp power is less than 0.1mW in both cases.
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