MEDIA ALERT: Sidense to Exhibit at GSA Expo

Market Wire, September, 2008

What
Sidense Exhibiting at the GSA Suppliers Expo and Conference

Where
Booth 219
Santa Clara Convention Center
Santa Clara, California

When
9AM to 6PM
Thursday, October 2, 2008

For more information or to schedule a meeting with Sidense at the GSA Expo
please contact:

Jim Lipman
Sidense
 jim@sidense.com 
925-606-1370

About Sidense

Sidense, listed on EE Times 60 Emerging Startups list for 2008, provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-Fuse(TM) architecture provides the industry's smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution.

Sidense SiPROM and SLP OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. The IP is available at UMC, TSMC, SMIC, Tower and Chartered. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit www.sidense.com

Contact: Jim Lipman Sidense Email Contact 925-606-1370