Fine-grain real-time reconfigurable pipelining

IBM Journal of Research and Development, Sep-Nov 2003 by Kim, Suhwan, Ziesler, Conrad H, Papaefthymiou, Marios C

Figures 4(a) and 4(b) show the timing diagrams of a conventional four-stage pipeline and a reconfigurable four-stage pipeline in its four-, one-, two-, and four-stage modes, respectively. These pipelines process four sets of input samples in total, each at the rate of four, one, two, and four samples per four cycles. Reconfiguration is performed with no need for any pipeline bubbles. When input rates are low, the reconfigurable pipeline uses idle cycles to spread the computation and eliminate three stages of registers, thus reducing register dissipation without sacrificing throughput.

In general, to ensure that no data is lost in an n-stage reconfigurable pipeline, when the input sampling rate is in the range (2^sup i-1^/n, 2^sup i^/n] samples per cycle, the number of registers bypassed by multiplexing, S, should be n/2^sup i^ - 1. If the input rate falls below 1/n samples per cycle, S stays at n - 1.

The control hardware overhead of our reconfiguration scheme is relatively low, amounting to O(log n) additional logic and state bits per stage in n-stage pipelines. Specifically, for each original pipeline stage, the number of status bits and the number of NAND gates introduced for clock gating are proportional to log n. Moreover, a single load-enable bit is required per stage. Therefore, the overall hardware overhead for controlling an n-stage reconfigurable pipeline is O(n log n).

The basic reconfiguration methodology described in this section can be enhanced in several ways to improve clock period and reduce power dissipation. For example, if we introduce a single-cycle pipeline bubble at each reconfiguration, we can effectively hide the delay of the multiplexer. Additional power savings can be obtained by disabling the local clock trees.

3. Application to MPEG video processing

In this section we give a brief overview of the MPEG video processing standard. We then describe the application of our reconfigurable pipelining scheme to the design of an inverse discrete cosine transform (IDCT) module for the MPEG processing pipeline. This module uses reconfigurable pipelined multipliers that operate at substantially reduced dissipation levels in comparison with their conventional counterparts.

In general, two coding types are used for video compression: intraframe and interframe. Intraframe coding exploits the spatial redundancy within a frame, while interframe coding exploits temporal redundancy between frames. Figure 5 depicts both the intraframe and interframe coding schemes in the MPEG video standard. It also shows the data hierarchies of video sequence, group of pictures (GOP), slice, macroblock (MB), and block. In the spatial domain, each video frame is divided into blocks with 8 � 8 pixels. Four luminance blocks and two chrominance blocks arc grouped to create a MB with 16 � 16 pixels. In the temporal domain, there are three types of frames: intra (I), predictive (P), and bidirectional (B) frames.

The encoding of I-frames is based on spatial redundancy. The purpose of P- and B-frames is to reduce temporal redundancy by motion compensation, which is accomplished by identifying, for every MB in the current frame, the best-matching MB from the previous or the next I- or P-frame. Both forward-prediction and backward-motion vectors (MVs) can be used for motion compensation during decoding. The motion-compensated prediction error (that is, the difference between the motion-compensated MB and the current MB) is transformed into an array of 8 � 8 transform coefficients using the two-dimensional (2D) DCT. The coefficients are quantized and subsequently encoded using run-length techniques. During decoding, the encoded video bitstream is analyzed into the motion vectors of each MB and the DCT coefficients of each block. The motion vectors are used to generate a motion-compensated prediction that is added to a decoded prediction-error signal to generate the reconstructed video.