Prototyping hardware and software environment for teaching digital circuit design

International Journal of Electrical Engineering Education, Oct 2001 by Trost, Andrej, Zemva, Andrej, Verderber, Matjaz

Abstract In the paper, we present our latest achievements and experience in undergraduate teaching of digital circuits, integrated circuits and embedded systems by exploiting our prototyping hardware and software environment The hardware environment is based on Field Programmable Gate Array (FPGA) modules that provide sufficient flexibility and support a broad scope of digital design applications. In addition, the designed software environment supports user-friendly hardware verification of the logic circuits implemented on the hardware system. We describe some typical applications and student projects implemented on the programmable prototyping system.

Keywords digital circuit design; educational prototyping systems; FPGA; rapid prototyping

Programmable prototyping systems are used extensively in digital design practice courses where students can experience the complete design process from initial circuit specification to the physical implementation and system integration.1 The Field Programmable Gate Array (FPGA) technology significantly reduces the time and the cost of the prototyping realization of the design and enables completion of large ASIC designs in the educational process.2

Our paper is organized in five sections. We first present a modular prototyping and verification system used in our laboratory practice courses covering the topics of digital design, integrated circuits and embedded systems. Then we discuss hardware of our prototyping system and software support for the hardware verification. The design cycle and the required time schedule for the specific subtasks are described next. They are followed by the presentation of the multi-FPGA approach and a description of a set of typical applications.

Prototyping and verification system

Basic building blocks of our hardware prototyping and verification system are presented in Fig. 1. The system consists of an FPGA module, CPLD interface connected to the PC, and additional I/O modules or DSP board.

We use different generations of FPGA modules based on Xilinx3 FPGA devices (XC4000E, Spartan and Virtex family) on the prototyping system. The modules are connected to the CPLD interface which performs configuration of the FPGA device and hardware verification of the design. Due to similar test and configuration connectors on the FPGA modules we can use the same CPLD interface and PC software for all generations of FPGA devices. The I/O modules are used for standalone operation of the designed digital system.

Prototyping FPGA modules

Modules of the first generation are built around FPGA devices of the XC4000E family. The module consists of two FPGA devices (XC4008E and XC4010E), 64k x 16 bits of fast static RAM (15 ns access time), test and configuration connector and two additional I/O connectors.

The second generation modules are based upon Spartan FPGA devices. The module contains one FPGA device XCS40, 64k x 24 bits of fast static RAM, two test and configuration connectors and two additional I/0 connectors. The second test and configuration connector can be used to cascade Spartan modules and build a larger prototyping environment as described later.

The modules of the last generation are built around the Virtex XCV1OO FPGA device. The module is presented in Fig. 2. The test and configuration connector provide 40 I/O signals for hardware verification of the design implemented in the FPGA device, FPGA configuration signals, JTAG signals and power supply. A DC/DC converter on the board produces the required power supply for the Virtex FPGA device. The FPGA can access up to 128k x 24 bits of fast static RAM on the module.

With the Virtex module we can create an FPGA-DSP prototyping system by connecting the I/O signals to the expansion connector on the ADSP-2181 Board,4 as presented in Fig. 2. The prototyping system is well suited for audio and signal processing applications where the FPGA is used to improve performance of the algorithm implemented in software.

Hardware verification interface

The hardware verification interface is used for configuration of the FPGA device on the prototyping module and hardware verification of the design. The interface is connected to the PC parallel port which provides test vectors and reads verification results. The interface logic is implemented in a CPLD device XC95108.

The interface provides 40 1/0 signals divided into five 8-bit blocks. Each block can be set as an input or output block during initialization of the interface. The output blocks are used for sending test vectors to the inputs of the FPGA module. The input blocks are used for reading the outputs of the FPGA design and sending the signals to the PC.

A hardware verification program on the PC divides each test vector into 8-bit parts and sends each part through the parallel port to the internal registers of the output blocks. When the whole test vector is composed in the interface, it is copied to the output registers which are connected directly to the inputs of the FPGA. In the next step, the FPGA outputs are sampled by the interface input blocks and sent back to the PC.