Phase locked system design and measurement tutorial consisting of physical hardware and co-simulation environment

International Journal of Electrical Engineering Education, Oct 2004 by Burbidge, Martin John

1 Simulation exercises and familiarisation with lab notes;

2 Basic hardware testing;

3 VCO gain testing;

4 Transfer function monitoring;

5 Step response monitoring.

A strict requirement of the ordering is that the basic hardware testing (item 2) must be carried out before other hardware characterisation.

Response monitoring and measurement is carried out via use of an Agilent 54622D7 oscilloscope connected to a personal computer. Signal generation is carried out using an Agilent 33120A8 arbitrary waveform generator. Specific spreadsheets with incorporated equations have been developed to allow automatic plotting of the PLLs transfer function and VCO gain. Assessment is primarily carried out via comparison of the student's results for particular experiments against pre-calculated results. In addition, suitable questions are included to assess the students' understanding of key concepts.

Subsequent sections of this paper are used to provide more detailed examples of the course material.

The second section is used to introduce the PLL simulation models. This section also provides an overview of basic PLL theory required for the course. In addition, analytical and simulation plots relating to PLL operation are shown.

The third section provides an outline of the hardware board and describes the associated functionality. This is followed by a summary of typical background theoretical material that is included in the lab session. A schematic representation of a typical test set-up is then shown. The section also outlines the test procedure and lab documentation for a transfer function test. Typical Excel(TM) results and example questions are also documented.

The final section is used to summarise the paper.

Simulation models and PLL descriptions and example output response

The primary purpose of the simulation-based parts of the course is to provide the student with behavioural and analytical models that correspond to material included in the practical sessions. Phase locked loop simulation models are investigated with reference to the practical course material. This is done so that the student can gain some familiarity with the test methods prior to attending the practical sessions. The material in this module is also used to summarise the key equations relating to the course.

An overview of the contents of the simulation-based module is provided as follows:

1 Spice PLL model, operational explanation and general equations;

2 Standard analytical models for frequency step response and transfer function response;

3 Simulations of various PLL blocks, including (a) Phase detector and loop filter; (b) VCO (Voltage controlled oscillator);

4 Spice simulation for step response;

5 Spice simulation for phase transfer response.

Mixed mode (SPICE and XSPICE) models for the PLL models used in the course were developed within the B2SPICE9 simulation package. Further models were developed for use in the SMASH10 EESOF11 and SPECTRE12 simulation environments. It is intended that the additional models are used in a more advanced course related to RF modelling and design. The analytical models were developed for use in MATLAB13 and OCTAVE14.