Phase locked system design and measurement tutorial consisting of physical hardware and co-simulation environment

International Journal of Electrical Engineering Education, Oct 2004 by Burbidge, Martin John

Conclusions and further work

This paper has outlined a set of practical and theoretical course materials related to the measurement and design of phase locked loop (PLL) systems. The primary focus of the material is towards characterisation, measurement and design of a real demonstrator circuit. However, a significant theoretical and simulation-based aspect of the course is included. Simulation models are mapped to the physical hardware system and allow the student to experiment with various measurement scenarios prior to attendance of the lab sessions. Throughout the material, emphasis is placed on observing differences between real and simulated measurements. Although material is related specifically to phase locked loop systems, the techniques used and information given are also of benefit in reinforcing general control and feedback theory. The general teaching approach of coupling specific simulation models with hardware demonstration boards has received promising student feedback.

Samples of the material associated with this paper and related topics can be found by following links at http://www.sli-institute.ac.uk. After accessing this website follow the 'distance learning' link in the left-hand frame and select 'sample courses'. This will take you to the 'blackboard' site http://blackboard.sli-institute.ac.uk/ index.html. Click 'login', then click the 'preview' button and select 'semiconductor Design for Testability (Sample Course)'.

Acknowledgement

The author would like to thank ILSI Livingston, Scotland for providing resources and support.

References

1 R. Gayakwad and L. Sokoloff, Analog and Digital Control Systems (Prentice Hall, Englewood Cliffs, NJ, 1998).

2 R. Best, Phase Locked Loops, Design Simulation and Applications, 4th edn (McGraw-Hill, New York, 1999).

3 B. Razavi (Ed.), Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design (IEEE Press, Stevenage, 1996).

4 W. Bolton, Control Systems (Elsevier, Burlington, MA, 2002).

5 Analog devices phase locked loop website, http://www.analog.com/pll, accessed Jan 2004.

6 National semiconductors wireless website, http://www.national.com/analogu/wireless, accessed Jan 2004.

7 Agilent 33120A Function/Arbitrary Waveform Generator Data Sheet, Printed in USA May 2, 2001, 5968-0125EN.

8 Agilent Technologies 54600-Series Oscilloscopes Data Sheet, Printed in USA April 18, 2003, 59688152EN.

9 B2SPICE website, http://www.beigebag.com, accessed Jan 2004.

10 Dolphin Integration SMASH(TM) website, http://www.dolphin.fr/medal/smash/smash_overview.html, accessed Jan 2004.

11 Cadence Spectre web site, http://www.cadence.com/products/custom_ic/spectre/index.aspx, active Jan 2004.

12 Agilent EESOF website, http://eesof.tm.agilent.com/, active Jan 2004.

13 MATLAB website, http://www.mathworks.com/, active Jan 2004.

14 OCTAVE website, http://www.octave.org/, active Jan 2004.

15 74HC/HCT4046A Phase-locked loop with VCO, Philips Semiconductors Data Sheet, November 1997.

Martin John Burbidge1,2

1 Faculty of Applied Sciences, Lancaster University, Lancaster, UK

 

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